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Senior FPGA Design Engineer

Posted:
December 6, 2021

Location:
Syracuse, NY

A Senior FPGA Design Engineer at Hidden Level will apply their skills and experience to lead the design and development of HDL architectures for cutting-edge sensor and communication systems.

As a Senior FPGA Design Engineer, you can expect to…

Work in a motivated cross-disciplinary environment:
  • Work in a small, dedicated team passionate about solving challenging problems and delivering results
  • Collaborate with Software, Systems, Mechanical, and RF engineers to design and improve embedded firmware systems
  • Participate in collaborative, cross-functional design and code reviews
  • Aid in the creation and review of requirements and develop solutions to meet design goals
Develop and maintain configurations for FPGA-based systems:
  • Architect and design HDL solutions for the latest Xilinx FPGAs and SoC devices such as Zynq Ultrascale+ and Zynq Ultrascale+ RFSoCs
  • Create and implement HDL components for data acquisition, digital signal processing, command and control, external hardware interfaces, high-speed communication protocols such as Ethernet and PCIe, and more
  • Perform timing closure and create well-constrained, maintainable solutions that are easily extensible and employ an efficient use of resources
  • Integrate and test new designs in simulation, lab, and field environments
  • Use Python, TCL, and other scripting languages to automate and improve workflows

A successful candidate may have…

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
  • 10+ years related professional experience
  • Proficiency with VHDL and/or Verilog to configure FPGAs and other embedded systems
  • Experience writing thorough, self-checking test benches for automated unit-test
  • Ability to work in a fast-paced environment and overcome technical challenges through teamwork and collaboration
  • Excellent written and oral communication skills, coupled with the ability to listen, question, and understand stakeholder needs
  • Experience with or the willingness to learn about:
    • Communication, Radar, and other Sensor systems
    • Real-time control of RF front-end, memories, high-speed interfaces, and other hardware components
    • Xilinx FPGAs and the Vivado design environment and capabilities
    • Matlab, Simulink, HDLCoder, and Xilinx System Generator
    • Digital Signal Processing, Software Defined Radios, and RF System Design

Hidden Level Benefits

  • Salary commensurate with experience
  • Flexible Work from Home or Hybrid arrangements
  • Unlimited PTO
  • 401(k) with employer contribution
  • Potential Stock Options Package
  • Health Care package including Dental, Medical, and Vision Insurance
  • Company paid Life Insurance
  • Company paid Short- and Long-Term Disability Insurance

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